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Description: Design Simulation and synthesis of a fft processor using VHDL
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Size: 362496 |
Author: lys |
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Description: 并行分块的fft实现
基于斯坦福大学Imagine模拟器开发设计的FFT并行分块实现-Fft parallel sub-block-based simulator developed at Stanford University Imagine design block realize parallel FFT
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Size: 27648 |
Author: |
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Description: FFT 32k use VHDL MATLAB
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Size: 985088 |
Author: |
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Description: 包含软件无线电、dds、滤波器设计、数字调制解调等常用无线通信设计的matlab\verilog源码-Contains software radio, dds, filter design, digital modulation and demodulation of wireless communication, such as commonly used design matlabverilog source
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Size: 197632 |
Author: 李大鹏 |
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Description: VHDL fft 源程序,直接运行就可以,很好的一个程序-VHDL fft source code can be run directly, a very good program
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Size: 1123328 |
Author: 苗哥 |
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Description: 基于FPGA的高速FFT处理器的设计与实现-FPGA-based high-speed FFT Processor Design and Implementation
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Size: 73728 |
Author: 萧球水 |
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Description: 这里边有EDA设计常用模块的源代码,FFT,DDS PS2_keyboard,VGA等,有学FPGA的就参考一下吧-Here the design of commonly used modules have EDA source code, FFT, DDS PS2_keyboard, VGA and so on, have places on the FPGA reference yourself
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Size: 208896 |
Author: li |
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Description: 对vga接口做了详细的介绍,并且有一
·三段式Verilog的IDE程序,但只有DMA
·电子密码锁,基于fpga实现,密码正
·IIR、FIR、FFT各模块程序设计例程,
·基于逻辑工具的以太网开发,基于逻
·自己写的一个测温元件(ds18b20)的
·光纤通信中的SDH数据帧解析及提取的
·VHDL Programming by Example(McGr
·这是CAN总线控制器的IP核,源码是由
·FPGA设计的SDRAM控制器,有仿真代码
·xilinx fpga 下的IDE控制器原代码,
·用verilog写的,基于查表法实现的LO
·精通verilog HDL语言编- up:in STD_LOGIC
down:in STD_LOGIC
run_stop:in STD_LOGIC
wai_t: in std_logic_vector(2 downto 0)
lift:in std_logic_vector(2 downto 0)
ladd: out std_logic_vector(1 downto 0)
)
end control
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Size: 18683904 |
Author: liuzhou |
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Description: This is a source code of 256 point fft architecture. This code is also available with opencores-This is a source code of 256 point fft architecture. This code is also available with opencores
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Size: 2048 |
Author: Mohan |
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Description: 采用verilog代码编写了一个64位的fft,其中蝶形算法采用基2算法-the fft of 64 points
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Size: 14336 |
Author: Evolchs |
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Description: 一个 16点 FFT 用基2蝶形运算单元完成,有测试环境。-16 points FFT with a radix-2 butterfly computation unit is completed and test environment.
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Size: 21504 |
Author: wei |
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Description: fft实现的RTL代码,仅仅只能作为参考。多用VERIlog习惯的 很有帮助-fft implementation RTL code, just only as a reference. Multi VERIlog helpful habit
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Size: 680960 |
Author: 张新 |
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Description: verilog的300个例子,很全的,我自己都试过-verilog 300 examples, it is full, and I have tried
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Size: 113664 |
Author: kenshin |
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Description: 8位加法器啊,FFT的c++程序
实现加法器的Verilog语言程序-8-bit adder ah, FFT of c++ program to achieve Adder Verilog language program
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Size: 2048 |
Author: 明义 |
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Description:
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Size: 140288 |
Author: 李云龙 |
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Description: FFT的FPGA实现,使用verilog实现-FFT FPGA
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Size: 1208320 |
Author: libing |
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Description: FFT旋转因子,旋转因子是蝶形运算的组成部分,是数字信号处理FFT算法的基础部分-FFT twiddle factor, rotation factor is an integral part of the butterfly, digital signal processing is a fundamental part of FFT algorithm
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Size: 1024 |
Author: 姚兴波 |
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Description:
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Size: 1249280 |
Author: chengyungang |
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Description: 快速傅立叶变换FFT的verilog实现详解.pdf-Detailed FFT-verilog implementation. Pdf
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Size: 704512 |
Author: 左会刚 |
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Description: fft的vhdl实现源代码,具体的有心情有兴趣的可以自己下载下来看下,因为我也是在入门中不懂。-fft verilog HDL
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Size: 7241728 |
Author: liu |
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